Intel CTO tells Dwarkesh Patel the world lacks tools to 10x chip output

The Next Web
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Intel CTO Pushkar Ranade stated that the global chipmaking industry currently lacks the equipment to increase leading-edge wafer production by 10 times, estimating a maximum doubling instead. He highlighted EUV lithography machines as the main bottleneck and noted that Intel's 14A process, expected in 2028, aims to match TSMC's N2 in transistor density but differs in other metrics.

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